LibXenon
Bare-metal Xbox 360 homebrew library
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edram.c
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1#include <xenos/edram.h>
2
3#include "xe.h"
4#include "xe_internal.h"
5
6#include <stdio.h>
7#include <stdlib.h>
8#include <time/time.h>
9#include <string.h>
10#include <assert.h>
11#include <xetypes.h>
12
13extern void xenos_write32(int reg, uint32_t val);
14extern uint32_t xenos_read32(int reg);
15
16extern u32 xenos_id;
17
18u32 edram_id=0,edram_rev=0;
19
20static uint32_t edram_read(int addr)
21{
22 uint32_t res;
23 xenos_write32(0x3c44, addr);
24 while (xenos_read32(0x3c4c));
25 res = xenos_read32(0x3c48);
26 while (xenos_read32(0x3c4c));
27 xenos_write32(0x3c44, addr);
28 while (xenos_read32(0x3c4c));
29 res = xenos_read32(0x3c48);
30 while (xenos_read32(0x3c4c));
31 return res;
32}
33
34static void edram_write(int addr, unsigned int value)
35{
36 while (xenos_read32(0x3c4c));
37 xenos_write32(0x3c40, addr);
38 while (xenos_read32(0x3c4c));
39 xenos_write32(0x3c48, value);
40 while (xenos_read32(0x3c4c));
41
42 xenos_write32(0x3c40, 0x1A);
43 while (xenos_read32(0x3c4c));
44 xenos_write32(0x3c40, value);
45 while (xenos_read32(0x3c4c));
46}
47
48static void edram_rmw(int addr, int bit, int mask, int val)
49{
50 edram_write(addr, (edram_read(addr) & ~mask) | ((val << bit) & mask));
51}
52
53void edram_p3(int *res)
54{
55 int chip, phase;
56
57 for (chip = 0; chip < 9; ++chip)
58 res[chip] = 0;
59
60 for (phase = 0; phase < 4; ++phase)
61 {
62 edram_write(0x5002, 0x15555 * phase);
63 int v = edram_read(0x5005);
64 for (chip = 0; chip < 9; ++chip)
65 {
66 int bit = (v >> chip) & 1;
67
68 res[chip] |= bit << phase;
69 }
70 }
71}
72
73void edram_p4(int *res)
74{
75 int chip, phase;
76
77 for (chip = 0; chip < 6; ++chip)
78 res[chip] = 0;
79
80 for (phase = 0; phase < 4; ++phase)
81 {
82 xenos_write32(0x3c5c, 0x555 * phase);
83 uint32_t r = xenos_read32(0x3c68);
84
85 for (chip = 0; chip < 6; ++chip)
86 {
87 int bit = (r >> chip) & 1;
88
89 res[chip] |= bit << phase;
90 }
91 }
92}
93
94int edram_p2(int r3, int r4, int r5, int r6, int r7, int r8, int r9, int r10)
95{
96 int a = edram_read(0x5002);
97 edram_write(0x5002, 0xa53ca53c);
98 int b = edram_read(0x5002);
99 if ((b & 0x1ffff) != 0xA53C)
100 return -1;
101 edram_write(0x5002, 0xfee1caa9);
102 b = edram_read(0x5002);
103 if ((b & 0x1ffff) != 0x1caa9)
104 return -2;
105 edram_write(0x5002, a);
106
107 xenos_write32(0x3c54, 1);
108 if (r10)
109 {
110 xenos_write32(0x3c54, xenos_read32(0x3c54) &~ (1<<9));
111 xenos_write32(0x3c54, xenos_read32(0x3c54) &~ (1<<10));
112
113// assert(xenos_read32(0x3c54) == 0x1);
114 } else
115 {
116 xenos_write32(0x3c54, xenos_read32(0x3c54) | (1<<9));
117 xenos_write32(0x3c54, xenos_read32(0x3c54) | (1<<10));
118 }
119 while (xenos_read32(0x3c4c));
120
121 edram_write(0x4000, 0xC0);
122 if (xenos_id<0x5841) xenos_write32(0x3c90, 0);
123 xenos_write32(0x3c00, xenos_read32(0x3c00) | 0x800000);
124// assert(xenos_read32(0x3c00) == 0x8900000);
125 xenos_write32(0x0214, xenos_read32(0x0214) | 0x80000000);
126// assert(xenos_read32(0x0214) == 0x8000001a);
127 xenos_write32(0x3c00, xenos_read32(0x3c00) | 0x400000);
128 xenos_write32(0x3c00, xenos_read32(0x3c00) &~0x400000);
129 xenos_write32(0x3c00, xenos_read32(0x3c00) &~0x800000);
130 xenos_write32(0x0214, xenos_read32(0x0214) &~0x80000000);
131// assert(xenos_read32(0x214) == 0x1a);
132 edram_write(0xffff, 1);
133 while (xenos_read32(0x3c4c));
134 edram_write(0x5001, 7);
135 int s = 7;
136
137 xenos_write32(0x3c58, xenos_read32(0x3c58) | 4);
138 xenos_write32(0x3c58, xenos_read32(0x3c58) &~3);
139
140// assert(xenos_read32(0x3c58) == 0x00000ff4);
141
142 if (r8)
143 {
144 assert(0);
145 while (xenos_read32(0x3c4c));
146 s = edram_read(0x5003);
147 s |= 0x15555;
148 edram_write(0x5003, s);
149 edram_write(0x5003, s &~ 0x15555);
150 }
151 if (r9)
152 {
153 assert(0);
154 while (xenos_read32(0x3c4c));
155 int v = xenos_read32(0x3c60) | 0x555;
156 xenos_write32(0x3c60, v);
157 xenos_write32(0x3c60, v &~0x555);
158 }
159 if (r8)
160 {
161 assert(0);
162 xenos_write32(0x3c54, xenos_read32(0x3c54) &~2);
163 xenos_write32(0x3c90, 0x2aaaa);
164 xenos_write32(0x3c6c, 0x30);
165 xenos_write32(0x3c70, 0x30);
166 xenos_write32(0x3c74, 0x30);
167 xenos_write32(0x3c78, 0x30);
168 xenos_write32(0x3c7c, 0x30);
169 xenos_write32(0x3c80, 0x30);
170 xenos_write32(0x3c84, 0x30);
171 xenos_write32(0x3c88, 0x30);
172 xenos_write32(0x3c8c, 0x30);
173 xenos_write32(0x3c6c, xenos_read32(0x3c6c) &~ 0xFF);
174 xenos_write32(0x3c70, xenos_read32(0x3c70) &~ 0xFF);
175 xenos_write32(0x3c74, xenos_read32(0x3c74) &~ 0xFF);
176 xenos_write32(0x3c78, xenos_read32(0x3c78) &~ 0xFF);
177 xenos_write32(0x3c7c, xenos_read32(0x3c7c) &~ 0xFF);
178 xenos_write32(0x3c80, xenos_read32(0x3c80) &~ 0xFF);
179 xenos_write32(0x3c84, xenos_read32(0x3c84) &~ 0xFF);
180 xenos_write32(0x3c88, xenos_read32(0x3c88) &~ 0xFF);
181 xenos_write32(0x3c8c, xenos_read32(0x3c8c) &~ 0xFF);
182 } else
183 {
184 xenos_write32(0x3c54, xenos_read32(0x3c54) | 2);
185// assert(xenos_read32(0x3c54) == 3);
186 }
187 if (r9)
188 {
189 assert(0);
190 edram_rmw(0x5000, 1, 2, 0);
191 edram_write(0x500c, 0x3faaa);
192 edram_write(0x5006, 0x30);
193 edram_write(0x5007, 0x30);
194 edram_write(0x5008, 0x30);
195 edram_write(0x5009, 0x30);
196 edram_write(0x500a, 0x30);
197 edram_write(0x500b, 0x30);
198 edram_rmw(0x5006, 7, 0x3f80, 0);
199 edram_rmw(0x5007, 7, 0x3f80, 0);
200 edram_rmw(0x5008, 7, 0x3f80, 0);
201 edram_rmw(0x5009, 7, 0x3f80, 0);
202 edram_rmw(0x500a, 7, 0x3f80, 0);
203 edram_rmw(0x500b, 7, 0x3f80, 0);
204
205 edram_rmw(0x5006, 14, 0x1fc000, 0);
206 edram_rmw(0x5007, 14, 0x1fc000, 0);
207 edram_rmw(0x5008, 14, 0x1fc000, 0);
208 edram_rmw(0x5009, 14, 0x1fc000, 0);
209 edram_rmw(0x500a, 14, 0x1fc000, 0);
210 edram_rmw(0x500b, 14, 0x1fc000, 0);
211
212 edram_write(0x500c, 0x3f000);
213 } else
214 {
215 edram_rmw(0x5000, 1, 2, 1);
216 }
217 if (r8)
218 {
219 /* later */
220 }
221 // bb584
222 xenos_write32(0x3c54, xenos_read32(0x3c54) | 0x20);
223 xenos_write32(0x3c54, xenos_read32(0x3c54) &~0x20);
224 int i;
225
226 int res_cur[9], temp[9], res_base[9];
227 int valid[36] = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};
228 int useful[64] = {0,1,0,1,0,0,0,0,0,1,0,1,0,0,0,0,0,0,1,1,0,0,1,1,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0};
229 int phase_count[9] = {4,4,4,4,4,4,4,4,4};
230 int stable[9] = {1,1,1,1,1,1,1,1,1};
231 int defaults[4] = {11,7,15,13}; // 1011 0111 1111 1101
232 int data6_old[16] = {1,3,0,3,1,1,0,0,2,2,1,3,1,2,1,1};
233 int data6_new[16] = {0,2,3,2,0,0,3,3,1,1,0,2,0,1,0,0};
234 int data7[16] = {0,2,3,2,0,0,3,3,1,1,0,2,0,1,0,0};
235
236 int chip, phase;
237 int res = 0;
238
239#if 1
240 for (i = 0; i < 50; ++i) /* outer */
241 {
242 edram_p3(temp);
243#if 0
244 temp[0] = 0x3;
245 temp[1] = 0xd;
246 temp[2] = 0x6;
247 temp[3] = 0x1;
248 temp[4] = 0x3;
249 temp[5] = 0x1;
250 temp[6] = 0xd;
251 temp[7] = 0x2;
252 temp[8] = 0x2;
253#endif
254
255 memcpy(res_cur, temp, sizeof(res_cur));
256 if (!i)
257 memcpy(res_base, temp, sizeof(res_cur));
258
259 for (chip = 0; chip < 9; ++chip) /* inner */
260 {
261 for (phase = 0; phase < 4; phase++) /* phase */
262 {
263 if (valid[chip + phase * 9])
264 if (!useful[res_cur[chip] + phase * 4])
265 {
266 valid[chip + phase * 9] = 0;
267 phase_count[chip]--;
268 }
269 }
270 if (res_base[chip] != res_cur[chip])
271 stable[chip] = 0;
272 }
273 }
274#if 1
275 for (chip = 0; chip < 9; ++chip)
276 {
277 if (!stable[chip] && phase_count[chip] == 1)
278 {
279 for (phase = 0; phase < 4; ++phase)
280 {
281 if (valid[chip + phase * 9])
282 {
283 res_cur[chip] = defaults[phase];
284 }
285 }
286 }
287 }
288#endif
289 // bb734
290
291 int *data6;
292 data6 = (xenos_id==0x5821 && edram_rev>=0x10) || (xenos_id!=0x5821 && edram_rev>=0x20) ? data6_new : data6_old;
293
294 for (chip = 0; chip < 9; ++chip)
295 {
296// printf("%d | ", data6[res_cur[chip]]);
297 res |= data6[res_cur[chip]] << (chip * 2);
298 }
299 printf("final cfg: %08x\n", res);
300// assert(res == 0x2fcb);
301#else
302 int cur[9], rp[9];
303 memset(rp, 0xff, sizeof rp);
304 for (i = 0; i < 10; ++i)
305 {
306 edram_p3(cur);
307 int j;
308 for (j = 0; j < 9; ++j)
309 rp[j] &= cur[j];
310 }
311
312 res = 0;
313
314 for (i = 0; i < 9; ++i)
315 {
316 for (j = 0; j < 4; ++j)
317 if (rp[i] & (1<<j))
318 break;
319 if (j == 4)
320 printf("ed chip %d, inv\n", i);
321 j--; j&=3;
322 res |= j << (i * 2);
323 }
324#endif
325
326 edram_write(0x5002, res);
327
328 xenos_write32(0x3c54, xenos_read32(0x3c54) | 0x20);
329 xenos_write32(0x3c54, xenos_read32(0x3c54) &~0x20);
330
331 edram_rmw(0x5000, 2, 4, 1);
332 edram_rmw(0x5000, 2, 4, 0);
333 edram_rmw(0x5000, 3, 8, 1);
334 edram_rmw(0x5000, 3, 8, 0);
335
336 xenos_write32(0x3c58, xenos_read32(0x3c58) | 4);
337 xenos_write32(0x3c58, xenos_read32(0x3c58) | 3);
338
339 s = 4;
340 edram_write(0x5001, s);
341 edram_rmw(0x5000, 0, 1, 1);
342 if (r8)
343 xenos_write32(0x3c54, xenos_read32(0x3c54) &~2);
344 else
345 xenos_write32(0x3c54, xenos_read32(0x3c54) | 2);
346 edram_rmw(0x5000, 1, 2, r9 ? 0 : 1);
347 if (r9)
348 {
349 /* not yet */
350 }
351 /* bbf38 */
352 edram_rmw(0x5000, 5, 0x20, 1);
353 edram_rmw(0x5000, 5, 0x20, 0);
354 for (i = 0; i < 9; ++i)
355 phase_count[i] = 4;
356 for (i = 0; i < 9; ++i)
357 stable[i] = 1;
358 for (i = 0; i < 9; ++i)
359 valid[i] = valid[i + 9] = valid[i + 18] = valid[i + 27] = 1;
360
361#if 1
362 // bbfd4
363 int ht[6];
364 for (i = 0; i < 50; ++i)
365 {
366 edram_p4(ht);
367#if 0
368 ht[0] = 3;
369 ht[1] = 3;
370 ht[2] = 6; // 01 10 01 10 10 10
371 ht[3] = 3; // 01 11 10 10 11 10
372 ht[4] = 0xc;
373 ht[5] = 6;
374#endif
375 memcpy(res_cur, ht, sizeof(ht));
376 if (!i)
377 memcpy(res_base, ht, sizeof(ht));
378 for (chip = 0; chip < 6; ++chip)
379 {
380 for (phase = 0; phase < 4; ++phase)
381 {
382 if (valid[chip + phase * 9] && !useful[res_cur[chip] + phase * 4])
383 {
384 valid[chip + phase * 9] = 0;
385 phase_count[chip]--;
386 }
387 }
388 if (res_cur[chip] != res_base[chip])
389 stable[chip] = 0;
390 }
391 }
392#if 1
393 for (chip = 0; chip < 6; ++chip)
394 {
395 if (!stable[chip] && phase_count[chip] == 1)
396 {
397 for (phase = 0; phase < 4; ++phase)
398 if (valid[chip + phase * 9])
399 res_cur[chip] = defaults[phase];
400 }
401 }
402#endif
403
404 res = 0;
405 for (chip = 0; chip < 6; ++chip)
406 res |= data7[res_cur[chip]] << (chip*2);
407 printf("final cfg: %08x\n", res);
408// assert(res == 0x7ae);
409#else
410 memset(rp, 0xff, sizeof rp);
411 for (i = 0; i < 10; ++i)
412 {
413 edram_p4(cur);
414 int j;
415 for (j = 0; j < 6; ++j)
416 rp[j] &= cur[j];
417 }
418
419 res = 0;
420
421 for (i = 0; i < 6; ++i)
422 {
423 for (j = 0; j < 4; ++j)
424 if (rp[i] & (1<<j))
425 break;
426 if (j == 4)
427 printf("gp chip %d, inv\n", i);
428 j--; j&=3;
429 res |= j << (i * 2);
430 }
431#endif
432
433 xenos_write32(0x3c5c, res);
434
435 edram_rmw(0x5000, 5, 0x20, 1);
436 edram_rmw(0x5000, 5, 0x20, 0);
437 xenos_write32(0x3c54, xenos_read32(0x3c54) | 4);
438 xenos_write32(0x3c54, xenos_read32(0x3c54) &~4);
439 if (r6 >= 0x10)
440 {
441 xenos_write32(0x3cb4, 0xbbbbbb);
442 } else
443 {
444 assert(0);
445 xenos_write32(0x3c54, xenos_read32(0x3c54) | 8);
446 xenos_write32(0x3c54, xenos_read32(0x3c54) &~8);
447 }
448
449 xenos_write32(0x3c58, xenos_read32(0x3c58) | 3);
450 xenos_write32(0x3c58, xenos_read32(0x3c58) | 4);
451 edram_rmw(0x5001, 0, 3, 3);
452 edram_rmw(0x5001, 2, 4, 1);
453
454 edram_rmw(0x5001, 0, 3, 3);
455 edram_rmw(0x5001, 2, 4, 1);
456 xenos_write32(0x3c58, xenos_read32(0x3c58) &~3);
457 xenos_write32(0x3c58, xenos_read32(0x3c58) | 4);
458
459 if (r6 >= 0x10 && !r7)
460 {
461 xenos_write32(0x3c94, (xenos_read32(0x3c94) &~0xFF) | 0x13);
462 xenos_write32(0x3c94, xenos_read32(0x3c94) &~0x80000000);
463 xenos_write32(0x3c94, xenos_read32(0x3c94) | 0x80000000);
464// assert(xenos_read32(0x3c94) == 0x80000013);
465 } else
466 {
467 edram_rmw(0x5000, 0, 1, 1);
468 edram_rmw(0x5000, 8, 0x100, 1);
469
470 xenos_write32(0x3c54, xenos_read32(0x3c54) | 1);
471 xenos_write32(0x3c54, xenos_read32(0x3c54) | 0x100);
472
473 int cnt = 20;
474 while (cnt--)
475 {
476 udelay(5000);
477 if (xenos_read32(0x3c94) & 0x80000000)
478 {
479 printf("ping test: %08lx\n", xenos_read32(0x3c94));
480 break;
481 }
482 }
483
484 if (!cnt)
485 {
486 edram_rmw(0x5000, 0, 1, 0);
487 edram_rmw(0x5000, 8, 0x100, 0);
488
489 xenos_write32(0x3c54, xenos_read32(0x3c54) &~1);
490 xenos_write32(0x3c54, xenos_read32(0x3c54) &~0x100);
491
492 printf("ping test timed out\n");
493 return 1;
494 }
495 printf("ping test okay\n");
496 }
497
498 xenos_write32(0x3c54, xenos_read32(0x3c54) &~0x100);
499 xenos_write32(0x3c54, xenos_read32(0x3c54) &~1);
500// assert(xenos_read32(0x3c54) == 2);
501
502 edram_rmw(0x5000, 8, 0x100, 0);
503 edram_rmw(0x5000, 0, 1, 0);
504 edram_write(0xf, 1);
505 edram_write(0x100f, 1);
506 edram_write(0xf, 0);
507 edram_write(0x100f, 0);
508 edram_write(0xffff, 1);
509 edram_rmw(0x5001, 2, 4, 0);
510
511 xenos_write32(0x3c58, xenos_read32(0x3c58) &~4);
512 xenos_write32(0x3c58, (xenos_read32(0x3c58) &~ 0xF0) | 0xA0);
513 xenos_write32(0x3c58, xenos_read32(0x3c58) &~ 0xF00);
514
515 assert(xenos_read32(0x3c58) == 0xa0);
516
517 xenos_write32(0x3c00, (xenos_read32(0x3c00) &~ 0xFF) | (9<<3));
518 xenos_write32(0x3c00, xenos_read32(0x3c00) | 0x100);
519 //assert((xenos_read32(0x3c00) &~0x600) == 0x08100148);
520
521 while ((xenos_read32(0x3c00) & 0x600) < 0x400);
522
523 return 0;
524}
525
526void edram_pc(void)
527{
528 int i;
529
530 for (i = 0; i < 6; ++i)
531 {
532 xenos_write32(0x3c44, 0x41);
533 while (xenos_read32(0x3c4c) & 0x80000000);
534 }
535
536 for (i = 0; i < 6; ++i)
537 {
538 xenos_write32(0x3c44, 0x1041);
539 while (xenos_read32(0x3c4c) & 0x80000000);
540 }
541
542 for (i = 0; i < 6; ++i)
543 xenos_read32(0x3ca4);
544
545 for (i = 0; i < 6; ++i)
546 xenos_read32(0x3ca8);
547}
548
549int edram_compare_crc(uint32_t *crc)
550{
551 int i;
552
553 int fail = 0;
554
555 for (i = 0; i < 6; ++i)
556 {
557 xenos_write32(0x3c44, 0x41);
558 while (xenos_read32(0x3c4c) & 0x80000000);
559 if (xenos_read32(0x3c48) != *crc++)
560 fail |= 1<<6;
561// printf("%08x ", xenos_read32(0x3c48));
562 }
563
564 for (i = 0; i < 6; ++i)
565 {
566 xenos_write32(0x3c44, 0x1041);
567 while (xenos_read32(0x3c4c) & 0x80000000);
568 if (xenos_read32(0x3c48) != *crc++)
569 fail |= 1<<(i+6);
570// printf(" %08x", xenos_read32(0x3c48));
571 }
572// printf("\n");
573
574 for (i = 0; i < 6; ++i)
575 {
576 uint32_t v = xenos_read32(0x3ca4);
577 if (v != *crc++)
578 fail |= 1<<(i+12);
579 }
580
581 for (i = 0; i < 6; ++i)
582 {
583 uint32_t v = xenos_read32(0x3ca8);
584 if (v != *crc++)
585 fail |= 1<<(i+18);
586 }
587 return fail;
588}
589
590void edram_init_state1(void)
591{
592 if (xenos_id<0x5841) xenos_write32(0x214, xenos_id<0x5831 ? 0x1e : 0x15);
593 xenos_write32(0x3C00, (xenos_read32(0x3c00) &~ 0x003f0000) | 0x100000);
594 int v = (edram_read(0x4000) &~ 4) | 0x2A;
595 edram_write(0x4000, v);
596 edram_write(0x4001, xenos_id<0x5821 ? 0x2709f1 : 0x31);
597 v = (v &~ 0x20) | 0xC;
598 edram_write(0x4000, v);
599 v &= ~0xC;
600 edram_write(0x4000, v);
601 edram_write(0xFFFF, 1);
602 v |= 4;
603 edram_write(0x4000, v);
604 edram_write(0x4001, xenos_id<0x5821 ? 0x2709f1 : 0x31);
605 v &= ~0x4C;
606 edram_write(0x4000, v);
607 edram_write(0xFFFF, 1);
608 udelay(1000);
609
610 edram_id = edram_read(0x2000);
611 edram_rev= edram_id&0xffff;
612 printf("Xenos EDRAM ID=%08x\n", edram_id);
613
614 if (edram_p2(0, 0, 0, 0x11, 0, 0, 0, 1))
615 {
616 printf("edram_p2 failed\n");
617 abort();
618 }
619}
620
621int reloc[10];
622
623void edram_72c(struct XenosDevice *xe)
624{
625 // 0000072c: (+0)
626 rput32(0x00002000);
627 rput32(0x00800050);
628 // 00000734: (+2)
629 rput32(0x00002001);
630 rput32(0x00000000);
631 // 0000073c: (+4)
632 rput32(0x00002301);
633 rput32(0x00000000);
634 // 00000744: (+6)
635 rput32(0x0005210f);
636 rput32(0x41000000); rput32(0x41000000); rput32(0xc0800000); rput32(0x40800000); rput32(0x3f800000); rput32(0x00000000);
637 // 00000760: (+d)
638 rput32(0x00022080);
639 rput32(0x00000000); rput32(0x00000000); rput32(0x00080010);
640 // 00000770: (+11)
641 rput32(0xc0192b00);
642 rput32(0x00000000); rput32(0x00000018); rput32(0x30052003); rput32(0x00001200);
643 rput32(0xc4000000); rput32(0x00001005); rput32(0x00001200); rput32(0xc2000000);
644 rput32(0x00001006); rput32(0x10071200); rput32(0x22000000); rput32(0x1df81000);
645 rput32(0x00253b08); rput32(0x00000004); rput32(0x00080000); rput32(0x40253908);
646 rput32(0x00000200); rput32(0xc8038000); rput32(0x00b0b000); rput32(0xc2000000);
647 rput32(0xc80f803e); rput32(0x00000000); rput32(0xc2010100); rput32(0xc8000000);
648 rput32(0x00000000); rput32(0x02000000);
649 // 000007dc: (+2c)
650 rput32(0xc00d2b00);
651 rput32(0x00000001); rput32(0x0000000c); rput32(0x00011002); rput32(0x00001200);
652 rput32(0xc4000000); rput32(0x00001003); rput32(0x00002200); rput32(0x00000000);
653 rput32(0x50080001); rput32(0x1f1ff688); rput32(0x00004000); rput32(0xc80f8000);
654 rput32(0x00000000); rput32(0xc2000000);
655 // 00000818: (+3b)
656 rput32(0x00012180);
657 rput32(0x10030001); rput32(0x00000000);
658 // 00000824: (+3e)
659 rput32(0x000548ba);
660 rput32(0x00000003); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(reloc[2]); rput32(0x10000042);
661 // 00000840: (+45)
662 rput32(0x00054800);
663 rput32(0x80400002); rput32(reloc[8]); rput32(0x0000e00f); rput32(0x01000c14); rput32(0x00000000); rput32(0x00000200);
664 // 0000085c: (+4c)
665 rput32(0xc0003601);
666 rput32(0x00040086);
667
668
669 /* resolve */
670 // 00000864: (+4e)
671 rput32(0x00002318);
672 rput32(0x00100000);
673 // 0000086c: (+50)
674 rput32(0x00002319);
675 rput32(reloc[9]);
676 // 00000874: (+52)
677 rput32(0x0000231a);
678 rput32(0x00080020);
679 // 0000087c: (+54)
680 rput32(0x0000231b);
681 rput32(0x01000302);
682 // 00000884: (+56)
683 rput32(0xc00d2b00);
684 rput32(0x00000000); rput32(0x0000000c); rput32(0x10011002); rput32(0x00001200);
685 rput32(0xc4000000); rput32(0x00000000); rput32(0x1003c200); rput32(0x22000000);
686 rput32(0x05f80000); rput32(0x00253b48); rput32(0x00000002); rput32(0xc80f803e);
687 rput32(0x00000000); rput32(0xc2000000);
688 // 000008c0: (+65)
689 rput32(0x00012180);
690 rput32(0x00010002); rput32(0x00000000);
691 // 000008cc: (+68)
692 rput32(0x00002208);
693 rput32(0x00000006);
694 // 000008d4: (+6a)
695 rput32(0x00002200);
696 rput32(0x00000000);
697 // 000008dc: (+6c)
698 rput32(0x00002203);
699 rput32(0x00000000);
700 // 000008e4: (+6e)
701 rput32(0x00022100);
702 rput32(0x0000ffff); rput32(0x00000000); rput32(0x00000000);
703 // 000008f4: (+72)
704 rput32(0x00022204);
705 rput32(0x00010000); rput32(0x00010000); rput32(0x00000300);
706 // 00000904: (+76)
707 rput32(0x00002312);
708 rput32(0x0000ffff);
709 // 0000090c: (+78)
710 rput32(0x000548ba);
711 rput32(0x00000003); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(reloc[3]); rput32(0x1000001a);
712 // 00000928: (+7f)
713 rput32(0xc0003601);
714 rput32(0x00030088);
715
716 /* sync memory */
717 // 00000930: (+81)
718 rput32(0x00002007);
719 rput32(0x00000000);
720 // 00000938: (+83)
721 rput32(0x00000a31);
722 rput32(0x03000100);
723 // 00000940: (+85)
724 rput32(0x00010a2f);
725 rput32(0x00002000); rput32(reloc[9]);
726 // 0000094c: (+88)
727 rput32(0xc0043c00);
728 rput32(0x00000003); rput32(0x00000a31); rput32(0x00000000); rput32(0x80000000); rput32(0x00000008);
729 // 00000964: (+8e)
730 rput32(0x00002208);
731 rput32(0x00000004);
732 // 0000096c: (+90)
733 rput32(0x00002206);
734 rput32(0x00000000);
735}
736
737void edram_974(struct XenosDevice *xe)
738{
740 // 00000974: (+0)
741 rput32(0x00000a31);
742 rput32(0x02000000);
743 // 0000097c: (+2)
744 rput32(0x00010a2f);
745 rput32(0x00001000); rput32(reloc[0]);
746 // 00000988: (+5)
747 rput32(0xc0043c00);
748 rput32(0x00000003); rput32(0x00000a31); rput32(0x00000000); rput32(0x80000000); rput32(0x00000008);
749 // 000009a0: (+b)
750 rput32(0x00002000);
751 rput32(0x00800050);
752 // 000009a8: (+d)
753 rput32(0x00002001);
754 rput32(0x00000000);
755 // 000009b0: (+f)
756 rput32(0x00002301);
757 rput32(0x00000000);
758 // 000009b8: (+11)
759 rput32(0x0005210f);
760 rput32(0x41800000); rput32(0x41800000); rput32(0xc1800000); rput32(0x41800000); rput32(0x3f800000); rput32(0x00000000);
761 // 000009d4: (+18)
762 rput32(0x00022080);
763 rput32(0x00000000); rput32(0x00000000); rput32(0x00200020);
764}
765
766void edram_9e4(struct XenosDevice *xe)
767{
769 // 000009e4: (+0)
770 rput32(0xc0192b00);
771 rput32(0x00000000); rput32(0x00000018); rput32(0x30052003); rput32(0x00001200);
772 rput32(0xc4000000); rput32(0x00001005); rput32(0x00001200); rput32(0xc2000000);
773 rput32(0x00001006); rput32(0x10071200); rput32(0x22000000); rput32(0x1df81000);
774 rput32(0x00253b08); rput32(0x00000004); rput32(0x00080000); rput32(0x40253908);
775 rput32(0x00000200); rput32(0xc8038000); rput32(0x00b0b000); rput32(0xc2000000);
776 rput32(0xc80f803e); rput32(0x00000000); rput32(0xc2010100); rput32(0xc8000000);
777 rput32(0x00000000); rput32(0x02000000);
778 // 00000a50: (+1b)
779 rput32(0xc00d2b00);
780 rput32(0x00000001); rput32(0x0000000c); rput32(0x00011002); rput32(0x00001200);
781 rput32(0xc4000000); rput32(0x00001003); rput32(0x00002200); rput32(0x00000000);
782 rput32(0x50080001); rput32(0x1f1ff688); rput32(0x00004000); rput32(0xc80f8000);
783 rput32(0x00000000); rput32(0xc2000000);
784 // 00000a8c: (+2a)
785 rput32(0x00012180);
786 rput32(0x10030001); rput32(0x00000000);
787 // 00000a98: (+2d)
788 rput32(0x000548ba);
789 rput32(0x00000003); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
790 rput32(reloc[4]); rput32(0x10000042);
791 // 00000ab4: (+34)
792 rput32(0x00054800);
793 rput32(0x80400002); rput32(reloc[8]); rput32(0x0003e01f); rput32(0x01000c14);
794 rput32(0x00000000); rput32(0x00000200);
795 // 00000ad0: (+3b)
796 rput32(0xc0003601);
797 rput32(0x00040086);
798 // 00000ad8: (+3d)
799
800 rput32(0x00002318);
801 rput32(0x00100000);
802 // 00000ae0: (+3f)
803 rput32(0x00002319);
804 rput32(reloc[9]);
805 // 00000ae8: (+41)
806 rput32(0x0000231a);
807 rput32(0x00200020);
808 // 00000af0: (+43)
809 rput32(0x0000231b);
810 rput32(0x01000302);
811 // 00000af8: (+45)
812 rput32(0xc00d2b00);
813 rput32(0x00000000); rput32(0x0000000c); rput32(0x10011002); rput32(0x00001200);
814 rput32(0xc4000000); rput32(0x00000000); rput32(0x1003c200); rput32(0x22000000);
815 rput32(0x05f80000); rput32(0x00253b48); rput32(0x00000002); rput32(0xc80f803e);
816 rput32(0x00000000); rput32(0xc2000000);
817 // 00000b34: (+54)
818 rput32(0x00012180);
819 rput32(0x00010002); rput32(0x00000000);
820 // 00000b40: (+57)
821 rput32(0x00002208);
822 rput32(0x00000006);
823 // 00000b48: (+59)
824 rput32(0x00002200);
825 rput32(0x00000000);
826 // 00000b50: (+5b)
827 rput32(0x00002203);
828 rput32(0x00000000);
829 // 00000b58: (+5d)
830 rput32(0x00022100);
831 rput32(0x0000ffff); rput32(0x00000000); rput32(0x00000000);
832 // 00000b68: (+61)
833 rput32(0x00022204);
834 rput32(0x00010000); rput32(0x00010000); rput32(0x00000300);
835 // 00000b78: (+65)
836 rput32(0x00002312);
837 rput32(0x0000ffff);
838 // 00000b80: (+67)
839 rput32(0x000548ba);
840 rput32(0x00000003); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(reloc[6]); rput32(0x1000001a);
841 // 00000b9c: (+6e)
842 rput32(0xc0003601);
843 rput32(0x00030088);
844
845 // 00000ba4: (+70)
846 rput32(0x00002007);
847 rput32(0x00000000);
848 // 00000bac: (+72)
849 rput32(0x00000a31);
850 rput32(0x03000100);
851 // 00000bb4: (+74)
852 rput32(0x00010a2f);
853 rput32(0x00002000); rput32(reloc[9]);
854 // 00000bc0: (+77)
855 rput32(0xc0043c00);
856 rput32(0x00000003); rput32(0x00000a31); rput32(0x00000000); rput32(0x80000000); rput32(0x00000008);
857 // 00000bd8: (+7d)
858 rput32(0x00002208);
859 rput32(0x00000004);
860 // 00000be0: (+7f)
861 rput32(0x00002206);
862 rput32(0x00000000);
863}
864
865void edram_bec(struct XenosDevice *xe)
866{
868 // 00000bec: (+0)
869 rput32(0x00002000);
870 rput32(0x19000640);
871 // 00000bf4: (+2)
872 rput32(0x00002001);
873 rput32(0x00000000);
874 // 00000bfc: (+4)
875 rput32(0x00002301);
876 rput32(0x00000000);
877 // 00000c04: (+6)
878 rput32(0x0005210f);
879 rput32(0x44480000); rput32(0x44480000); rput32(0xc44c0000); rput32(0x444c0000); rput32(0x3f800000); rput32(0x00000000);
880 // 00000c20: (+d)
881 rput32(0x00022080);
882 rput32(0x00000000); rput32(0x00000000); rput32(0x06600640);
883 // 00000c30: (+11)
884 rput32(0xc0162b00);
885 rput32(0x00000000); rput32(0x00000015); rput32(0x10011003); rput32(0x00001200);
886 rput32(0xc4000000); rput32(0x00001004); rput32(0x00001200); rput32(0xc2000000);
887 rput32(0x00001005); rput32(0x10061200); rput32(0x22000000); rput32(0x0df81000);
888 rput32(0x00253b08); rput32(0x00000002); rput32(0xc8038000); rput32(0x00b06c00);
889 rput32(0x81010000); rput32(0xc80f803e); rput32(0x00000000); rput32(0xc2010100);
890 rput32(0xc8000000); rput32(0x00000000); rput32(0x02000000);
891 // 00000c90: (+29)
892 rput32(0xc0522b00);
893 rput32(0x00000001); rput32(0x00000051); rput32(0x00000000); rput32(0x6003c400);
894 rput32(0x12000000); rput32(0x00006009); rput32(0x600f1200); rput32(0x12000000);
895 rput32(0x00006015); rput32(0x00002200); rput32(0x00000000); rput32(0xc8030000);
896 rput32(0x00b06cc6); rput32(0x8b000002); rput32(0x4c2c0000); rput32(0x00ac00b1);
897 rput32(0x8a000001); rput32(0x08100100); rput32(0x00000031); rput32(0x02000000);
898 rput32(0x4c100000); rput32(0x0000006c); rput32(0x02000001); rput32(0xc8030001);
899 rput32(0x006c1ac6); rput32(0xcb010002); rput32(0xc8030001); rput32(0x00b00000);
900 rput32(0x8a010000); rput32(0xc8030001); rput32(0x00b0c600); rput32(0x81010000);
901 rput32(0xa8430101); rput32(0x00b00080); rput32(0x8a010000); rput32(0xc80f0001);
902 rput32(0x00c00100); rput32(0xc1010000); rput32(0xc80f0000); rput32(0x00000000);
903 rput32(0x88810000); rput32(0xc80f0000); rput32(0x01000000); rput32(0xed010000);
904 rput32(0xc80f0004); rput32(0x00aabc00); rput32(0x81000100); rput32(0xc8060000);
905 rput32(0x00166c00); rput32(0x86040100); rput32(0xc8090000); rput32(0x04c56c00);
906 rput32(0x80000100); rput32(0xc8030002); rput32(0x04b06c00); rput32(0x80040100);
907 rput32(0xc8070003); rput32(0x00bc6cb1); rput32(0x6c020000); rput32(0xc8020001);
908 rput32(0x00b06d6c); rput32(0xd1040002); rput32(0xc8010001); rput32(0x00b0b26c);
909 rput32(0xd1020302); rput32(0xc8080001); rput32(0x006d6e6c); rput32(0xd1040302);
910 rput32(0xc8040001); rput32(0x006d6d6c); rput32(0xd1020002); rput32(0xc8018000);
911 rput32(0x001a1a6c); rput32(0xd1010002); rput32(0xc8028000); rput32(0x00b01a6c);
912 rput32(0xd1010002); rput32(0xc8048000); rput32(0x00c71a6c); rput32(0xd1010002);
913 rput32(0xc8088000); rput32(0x006d1a6c); rput32(0xd1010002);
914 // 00000de0: (+7d)
915 rput32(0x00012180);
916 rput32(0x10010401); rput32(0x00000000);
917 // 00000dec: (+80)
918 rput32(0x000548ba);
919 rput32(0x00000003); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(reloc[5]); rput32(0x10000022);
920 // 00000e08: (+87)
921 rput32(0x000f4000);
922 rput32(0x3b800000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
923 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
924 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
925 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
926 // 00000e4c: (+98)
927 rput32(0x000f4400);
928 rput32(0x47c35000); rput32(0x3727c5ac); rput32(0x3eaaaaab); rput32(0x43800000);
929 rput32(0x3f800000); rput32(0x40000000); rput32(0x00000000); rput32(0x00000000);
930 rput32(0x00000000); rput32(0x3f800000); rput32(0x3f000000); rput32(0x00000000);
931 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
932 // 00000e90: (+a9)
933 rput32(0xc0003601);
934 rput32(0x00040086);
935 // 00000e98: (+ab)
936 rput32(0x00002201);
937 rput32(0x0b0a0b0a);
938 // 00000ea0: (+ad)
939 rput32(0xc0003601);
940 rput32(0x00040086);
941 // 00000ea8: (+af)
942 rput32(0x00002201);
943 rput32(0x00010001);
944 // 00000eb0: (+b1)
945 rput32(0x00002318);
946 rput32(0x00300000);
947 // 00000eb8: (+b3)
948 rput32(0x00002319);
949 rput32(0x00000000);
950 // 00000ec0: (+b5)
951 rput32(0x0000231a);
952 rput32(0x06600640);
953 // 00000ec8: (+b7)
954 rput32(0x0000231b);
955 rput32(0x01000302);
956 // 00000ed0: (+b9)
957 rput32(0xc00d2b00);
958 rput32(0x00000000); rput32(0x0000000c); rput32(0x10011002); rput32(0x00001200);
959 rput32(0xc4000000); rput32(0x00000000); rput32(0x1003c200); rput32(0x22000000);
960 rput32(0x05f80000); rput32(0x00253b48); rput32(0x00000002); rput32(0xc80f803e);
961 rput32(0x00000000); rput32(0xc2000000);
962 // 00000f0c: (+c8)
963 rput32(0x00012180);
964 rput32(0x00010002); rput32(0x00000000);
965 // 00000f18: (+cb)
966 rput32(0x00002208);
967 rput32(0x00000006);
968 // 00000f20: (+cd)
969 rput32(0x00002200);
970 rput32(0x00000000);
971 // 00000f28: (+cf)
972 rput32(0x00002203);
973 rput32(0x00000000);
974 // 00000f30: (+d1)
975 rput32(0x00022100);
976 rput32(0x0000ffff); rput32(0x00000000); rput32(0x00000000);
977 // 00000f40: (+d5)
978 rput32(0x00022204);
979 rput32(0x00010000); rput32(0x00010000); rput32(0x00000300);
980 // 00000f50: (+d9)
981 rput32(0x00002312);
982 rput32(0x0000ffff);
983 // 00000f58: (+db)
984 rput32(0x000548ba);
985 rput32(0x00000003); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(reloc[7]); rput32(0x1000001a);
986 // 00000f74: (+e2)
987 rput32(0xc0003601);
988 rput32(0x00030088);
989 // 00000f7c: (+e4)
990 rput32(0x00002007);
991 rput32(0x00000000);
992 // 00000f84: (+e6)
993 rput32(0x00002208);
994 rput32(0x00000004);
995 // 00000f8c: (+e8)
996 rput32(0x00002206);
997 rput32(0x00000000);
998
999}
1000
1001void edram_4c(struct XenosDevice *xe)
1002{
1003 // 0000004c: (+0)
1004 rput32(0xc0015000);
1005 rput32(0xffffffff); rput32(0x00000000);
1006 // 00000058: (+3)
1007 rput32(0xc0015100);
1008 rput32(0xffffffff); rput32(0xffffffff);
1009 // 00000064: (+6)
1010 rput32(0x00022080);
1011 rput32(0x00000000); rput32(0x00000000); rput32(0x01e00280);
1012 // 00000074: (+a)
1013 rput32(0x000005c8);
1014 rput32(0x00020000);
1015 // 0000007c: (+c)
1016 rput32(0x00032388);
1017 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1018 // 00000090: (+11)
1019 rput32(0x000005c8);
1020 rput32(0x00020000);
1021 // 00000098: (+13)
1022 rput32(0x0003238c);
1023 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1024 // 000000ac: (+18)
1025 rput32(0x000005c8);
1026 rput32(0x00020000);
1027 // 000000b4: (+1a)
1028 rput32(0x00032390);
1029 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1030 // 000000c8: (+1f)
1031 rput32(0x000005c8);
1032 rput32(0x00020000);
1033 // 000000d0: (+21)
1034 rput32(0x00032394);
1035 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1036 // 000000e4: (+26)
1037 rput32(0x000005c8);
1038 rput32(0x00020000);
1039 // 000000ec: (+28)
1040 rput32(0x00032398);
1041 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1042 // 00000100: (+2d)
1043 rput32(0x000005c8);
1044 rput32(0x00020000);
1045 // 00000108: (+2f)
1046 rput32(0x0003239c);
1047 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1048 // 0000011c: (+34)
1049 rput32(0x000005c8);
1050 rput32(0x00020000);
1051 // 00000124: (+36)
1052 rput32(0x00000f01);
1053 rput32(0x0000200e);
1054 // 0000012c: (+38)
1055 rput32(0x00252300);
1056 rput32(0x00000000); rput32(0x00000000); rput32(0x00000004); rput32(0x40000000);
1057 rput32(0x3f800000); rput32(0x40000000); rput32(0x3f800000); rput32(0x000ff000);
1058 rput32(0x000ff100); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1059 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1060 rput32(0x00000000); rput32(0x00000000); rput32(0x0000ffff); rput32(0x00000000);
1061 rput32(0x00000000); rput32(0x00000000); rput32(0x0000000e); rput32(0x00000010);
1062 rput32(0x00100000); rput32(0x1f923000); rput32(0x01e00280); rput32(0x01000300);
1063 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1064 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1065 rput32(0x00000002); rput32(0x00000000);
1066 // 000001c8: (+5f)
1067 rput32(0x00072380);
1068 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1069 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1070 // 000001ec: (+68)
1071 rput32(0x00bf4800);
1072 rput32(0x04000002); rput32(0x1f90b04f); rput32(0x000a61ff); rput32(0x01000c14);
1073 rput32(0x00000000); rput32(0x00000a00); rput32(0x00000000); rput32(0x00000000);
1074 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1075 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1076 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1077 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1078 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1079 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1080 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1081 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1082 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1083 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1084 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1085 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1086 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1087 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1088 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1089 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1090 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1091 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1092 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1093 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1094 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1095 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1096 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1097 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1098 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1099 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1100 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1101 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1102 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1103 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1104 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1105 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1106 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1107 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1108 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x01000000);
1109 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1110 rput32(0x00000000); rput32(0x01000000); rput32(0x00000000); rput32(0x00000000);
1111 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1112 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1113 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1114 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1115 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1116 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1117 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1118 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1119 rput32(0x00000001); rput32(0x00000000); rput32(0x00000001); rput32(0x00000000);
1120 // 000004f0: (+129)
1121 rput32(0x00274900);
1122 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1123 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1124 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1125 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1126 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1127 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1128 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1129 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1130 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1131 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1132 // 00000594: (+152)
1133 rput32(0x000f2000);
1134 rput32(0x0a000280); rput32(0x00000000); rput32(0x000000f0); rput32(0x00000000);
1135 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1136 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1137 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x20002000);
1138 // 000005d8: (+163)
1139 rput32(0x00142100);
1140 rput32(0x00ffffff); rput32(0x00000000); rput32(0x00000000); rput32(0x0000ffff);
1141 rput32(0x0000000f); rput32(0x3f800000); rput32(0x3f800000); rput32(0x3f800000);
1142 rput32(0x3f800000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1143 rput32(0x00ffff00); rput32(0x00ffff00); rput32(0x00000000); rput32(0x43a00000);
1144 rput32(0x43a00000); rput32(0xc3700000); rput32(0x43700000); rput32(0x3f800000);
1145 rput32(0x00000000);
1146 // 00000630: (+179)
1147 rput32(0x00042180);
1148 rput32(0x10130200); rput32(0x00000004); rput32(0x00010001); rput32(0x00000000);
1149 rput32(0x00000000);
1150 // 00000648: (+17f)
1151 rput32(0x000b2200);
1152 rput32(0x00700730); rput32(0x00010001); rput32(0x87000007); rput32(0x00000001);
1153 rput32(0x00090000); rput32(0x00018006); rput32(0x00000000); rput32(0x00000000);
1154 rput32(0x00000004); rput32(0x00010001); rput32(0x00010001); rput32(0x00010001);
1155 // 0000067c: (+18c)
1156 rput32(0x00142280);
1157 rput32(0x00080008); rput32(0x04000010); rput32(0x00000008); rput32(0x00000000);
1158 rput32(0x00000000); rput32(0x00000001); rput32(0x3f800000); rput32(0x3f800000);
1159 rput32(0x0000000e); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1160 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1161 rput32(0x00000000); rput32(0x00000000); rput32(0x00000000); rput32(0x00000000);
1162 rput32(0x00000000);
1163 // 000006d4: (+1a2)
1164 rput32(0x00000a31);
1165 rput32(0x02000000);
1166 // 000006dc: (+1a4)
1167 rput32(0x00010a2f);
1168 rput32(0x00001000); rput32(reloc[0]);
1169 // 000006e8: (+1a7)
1170 rput32(0xc0043c00);
1171 rput32(0x00000003); rput32(0x00000a31); rput32(0x00000000); rput32(0x80000000); rput32(0x00000008);
1172 // 00000700: (+1ad)
1173 rput32(0x00000a31);
1174 rput32(0x01000000);
1175 // 00000708: (+1af)
1176 rput32(0x00010a2f);
1177 rput32(0x00000100); rput32(reloc[1]);
1178 // 00000714: (+1b2)
1179 rput32(0xc0043c00);
1180 rput32(0x00000003); rput32(0x00000a31); rput32(0x00000000); rput32(0x80000000); rput32(0x00000008);
1181}
1182
1183static uint32_t determine_broken(uint32_t v0)
1184{
1185/*
118600006000
118700018000
118800410000
118900082000
119000700000
119100180000
1192*/
1193 int res = 0;
1194 if ((v0 & 0x00006000) == 0x00006000)
1195 res |= 1;
1196 if ((v0 & 0x00018000) == 0x00018000)
1197 res |= 2;
1198 if ((v0 & 0x00410000) == 0x00410000)
1199 res |= 4;
1200 if ((v0 & 0x00082000) == 0x00082000)
1201 res |= 8;
1202 if ((v0 & 0x00700000) == 0x00700000)
1203 res |= 16;
1204 if ((v0 & 0x00180000) == 0x00180000)
1205 res |= 32;
1206 return res;
1207}
1208
1209void edram_init(struct XenosDevice *xe)
1210{
1211 int tries = 4;
1212retry:
1213 if (!tries--)
1214 Xe_Fatal(xe, "damnit, EDRAM init failed, again and again.");
1215
1216 edram_init_state1();
1217
1218 int i;
1219#if 0
1220 printf("waiting for temperature to stabilize...\n");
1221
1222 for (i = 0; i < 40; ++i)
1223 {
1224 uint16_t data[4];
1225 xenon_smc_query_sensors(data);
1226
1227 printf("%f %f %f %f\n", data[0] / 256.0, data[1] / 256.0, data[2] / 256.0, data[3] / 256.0);
1228 delay(1);
1229 }
1230#endif
1231
1232 static u32 base;
1233 static void *ptr;
1234 if (!ptr)
1235 ptr = Xe_pAlloc(xe, &base, 0x4000, 0x100000);
1236
1237 /* state 2 */
1238 reloc[0] = base + 0x0000;
1239 reloc[1] = base + 0x2000;
1240 reloc[2] = base + 0x2003;
1241 reloc[3] = base + 0x2083;
1242 reloc[4] = base + 0x2043;
1243 reloc[5] = base + 0x20b3;
1244 reloc[6] = base + (0x2098|3);
1245 reloc[7] = base + 0x20d3;
1246 reloc[8] = (base + 0x0000) | (0x43 << 1);
1247 reloc[9] = base + 0x1000;
1248
1249 memset(ptr + 0, 1, 0x1000); /* debug only */
1250
1251 memset(ptr + 0x1000, 0x99, 0x1000);
1252
1253 *(u32*)(ptr + 0x108) = 0x1000;
1254 *(u32*)(ptr + 0x118) = 0x1;
1255 *(u32*)(ptr + 0x128) = 0x1100;
1256 *(u32*)(ptr + 0x12c) = 0x1000;
1257 *(u32*)(ptr + 0x13c) = 0;
1258
1259 float reg_00[] = {
1260 -0.5, 7.5, 0.0, 1.0, // top left
1261 -0.5, -0.5, 0.0, 0.0, // bottom left
1262 15.5, 7.5, 1.0, 1.0, // bottom right
1263 15.5, -0.5, 1.0, 0.0 // top right
1264 };
1265 float reg_40[] = {
1266 -0.5, 31.5, 0.0, 1.0,
1267 -0.5, -0.5, 0.0, 0.0,
1268 31.5, 31.5, 1.0, 1.0,
1269 31.5, -0.5, 1.0, 0.0
1270 };
1271 float reg_b0[] = {
1272 -0.5, 1631.5,
1273 -0.5, -0.5,
1274 1599.5, 1631.5,
1275 1599.5, -0.5
1276 };
1277 float reg_80[] = {-.5, 7.5, -.5, -.5, 15.5, -.5};
1278 float reg_98[] = {-.5, 31.5, -.5, -.5, 31.5, -.5};
1279 float reg_d0[] = {-.5, -.5, -.5, 1599.5, -.5};
1280
1281 memcpy(ptr + 0x2000 + 0x00, reg_00, sizeof(reg_00));
1282 memcpy(ptr + 0x2000 + 0x40, reg_40, sizeof(reg_40));
1283 memcpy(ptr + 0x2000 + 0xb0, reg_b0, sizeof(reg_b0));
1284 memcpy(ptr + 0x2000 + 0x80, reg_80, sizeof(reg_80));
1285 memcpy(ptr + 0x2000 + 0x98, reg_98, sizeof(reg_98));
1286 memcpy(ptr + 0x2000 + 0xd0, reg_d0, sizeof(reg_d0));
1287
1288 Xe_pSyncToDevice(xe, ptr, 0x4000);
1289
1290 w32(0x3c04, r32(0x3c04) &~ 0x100);
1291
1292// assert(r32(0x3c04) == 0x200e);
1293 udelay(1000);
1294 int var_1 = 0x111111;
1295 w32(0x3cb4, 0x888888 | var_1);
1296 udelay(1000);
1297 edram_pc();
1298
1299
1300 edram_4c(xe);
1301
1302 memset(ptr + 0x1000, 'Z', 0x1000);
1303 Xe_pSyncToDevice(xe, ptr, 0x4000);
1304
1305 w32(0x3c94, (r32(0x3c94) &~0x800000FF) | 0xb);
1306 udelay(1000);
1307 w32(0x3c94, r32(0x3c94) | 0x80000000);
1308 udelay(1000);
1309
1310 memset(ptr + 0x1000, 0, 0x1000);
1311 Xe_pSyncToDevice(xe, ptr, 0x4000);
1312
1313 int var_2;
1314
1315 int fail = 0;
1316 for (var_2 = 0xb; var_2 < 0x13; ++var_2)
1317 {
1318 /* state 4 */
1319 int seed = 0x425a;
1320 for (i = 0; i < 0x20 * 0x20; ++i)
1321 {
1322 seed *= 0x41c64e6d;
1323 seed += 12345;
1324
1325 int p1 = (seed >> 16) & 0x7fff;
1326
1327 seed *= 0x41c64e6d;
1328 seed += 12345;
1329
1330 int p2 = (seed >> 16) & 0x7fff;
1331
1332 int v = (p2<<16) + p1;
1333
1334 ((int*)ptr) [i] = v;
1335 }
1336 memset(ptr + 0x1000, 0x44, 0x1000);
1337 Xe_pSyncToDevice(xe, ptr, 0x4000);
1338
1339 w32(0x3c94, (r32(0x3c94) &~0x800000FF) | var_2);
1340 udelay(1000);
1341 w32(0x3c94, r32(0x3c94) | 0x80000000);
1342 udelay(1000);
1343
1344 edram_pc();
1345// edram_72c(xe);
1346 edram_974(xe);
1347// printf("before 9e4\n");
1348 edram_9e4(xe);
1349// printf("after 9e4\n");
1350
1351 Xe_pDebugSync(xe);
1352 Xe_pSyncFromDevice(xe, ptr, 0x4000);
1353
1354 uint32_t good_crc[] = {
1355 0xEBBCB7D0, 0xB7599E02, 0x0AEA2A7A, 0x2CABD6B8,
1356 0xA5A5A5A5, 0xA5A5A5A5, 0xE57C27BE, 0x43FA90AA,
1357 0x9D065F66, 0x360A6AD8, 0xA5A5A5A5, 0xA5A5A5A5,
1358 0xA5A5A5A5, 0xEBBCB7D0, 0xB7599E02, 0x0AEA2A7A,
1359 0x2CABD6B8, 0xA5A5A5A5, 0xA5A5A5A5, 0xE57C27BE,
1360 0x43FA90AA, 0x9D065F66, 0x360A6AD8, 0xA5A5A5A5
1361 };
1362
1363 fail = edram_compare_crc(good_crc);
1364 fail = determine_broken(fail);
1365
1366 if (fail != 0x3f)
1367 goto fix_xxx;
1368
1369 if (!fail) goto worked; /* OMGWTF IT WORKED!!1 */
1370 }
1371// printf("great, our base var_2 is %d, let's fix remaining problems\n", var_2);
1372
1373fix_xxx:;
1374
1375 int ixxx;
1376 for (ixxx = 0; ixxx < 6; ++ixxx)
1377 {
1378 int vxxx;
1379 if (!(fail & (1<<ixxx)))
1380 {
1381// printf("not touching, should be ok\n");
1382 continue;
1383 }
1384 for (vxxx = 0; vxxx < 4; ++vxxx)
1385 {
1386 var_1 &= ~(0xF<<(ixxx*4));
1387 var_1 |= vxxx << (ixxx * 4);
1388
1389 memset(ptr + 0, 1, 0x1000); /* debug only */
1390 *(u32*)(ptr + 0x108) = 0x1000;
1391 *(u32*)(ptr + 0x118) = 0x1;
1392 *(u32*)(ptr + 0x128) = 0x1100;
1393 *(u32*)(ptr + 0x12c) = 0x1000;
1394 *(u32*)(ptr + 0x13c) = 0;
1395
1396 Xe_pSyncToDevice(xe, ptr, 0x4000);
1397
1398 udelay(1000);
1399 w32(0x3cb4, var_1 | 0x888888);
1400 udelay(1000);
1401
1402 edram_pc();
1403 edram_72c(xe);
1404 Xe_pDebugSync(xe);
1405 Xe_pSyncFromDevice(xe, ptr, 0x4000);
1406
1407
1408 /* state 4 */
1409 int seed = 0x425a;
1410 for (i = 0; i < 0x20 * 0x20; ++i)
1411 {
1412 seed *= 0x41c64e6d;
1413 seed += 12345;
1414
1415 int p1 = (seed >> 16) & 0x7fff;
1416
1417 seed *= 0x41c64e6d;
1418 seed += 12345;
1419
1420 int p2 = (seed >> 16) & 0x7fff;
1421
1422 int v = (p2<<16) + p1;
1423
1424 ((int*)ptr) [i] = v;
1425 }
1426 memset(ptr + 0x1000, 0x44, 0x1000);
1427 Xe_pSyncToDevice(xe, ptr, 0x4000);
1428
1429 w32(0x3c94, (r32(0x3c94) &~0x800000FF) | var_2);
1430 udelay(1000);
1431 w32(0x3c94, r32(0x3c94) | 0x80000000);
1432 udelay(1000);
1433
1434 edram_pc();
1435 // edram_72c(xe);
1436 edram_974(xe);
1437 // printf("before 9e4\n");
1438 edram_9e4(xe);
1439 // printf("after 9e4\n");
1440
1441 Xe_pDebugSync(xe);
1442 Xe_pSyncFromDevice(xe, ptr, 0x4000);
1443
1444 uint32_t good_crc[] = {
1445 0xEBBCB7D0, 0xB7599E02, 0x0AEA2A7A, 0x2CABD6B8,
1446 0xA5A5A5A5, 0xA5A5A5A5, 0xE57C27BE, 0x43FA90AA,
1447 0x9D065F66, 0x360A6AD8, 0xA5A5A5A5, 0xA5A5A5A5,
1448 0xA5A5A5A5, 0xEBBCB7D0, 0xB7599E02, 0x0AEA2A7A,
1449 0x2CABD6B8, 0xA5A5A5A5, 0xA5A5A5A5, 0xE57C27BE,
1450 0x43FA90AA, 0x9D065F66, 0x360A6AD8, 0xA5A5A5A5
1451 };
1452
1453 fail = determine_broken(edram_compare_crc(good_crc));
1454// printf("[%08x]=%08x ", var_1, fail);
1455 if (!(fail & (1<< ixxx)))
1456 {
1457// printf("cool");
1458 break;
1459 }
1460 }
1461 if (vxxx == 4)
1462 {
1463// printf("can't fix that :(\n");
1464 break;
1465 }
1466
1467// printf("\n");
1468 }
1469 if (fail)
1470 goto retry;
1471worked:
1472 printf("EDRAM %08x, %08x\n", var_1, var_2);
1473}
base
#define base
edram_9e4
void edram_9e4(struct XenosDevice *xe)
Definition: edram.c:766
edram_p2
int edram_p2(int r3, int r4, int r5, int r6, int r7, int r8, int r9, int r10)
Definition: edram.c:94
xenos_read32
uint32_t xenos_read32(int reg)
Definition: xenos.c:32
edram_p3
void edram_p3(int *res)
Definition: edram.c:53
reloc
int reloc[10]
Definition: edram.c:621
xenos_id
u32 xenos_id
Definition: xenos.c:21
edram_pc
void edram_pc(void)
Definition: edram.c:526
edram_init_state1
void edram_init_state1(void)
Definition: edram.c:590
edram_p4
void edram_p4(int *res)
Definition: edram.c:73
edram_id
u32 edram_id
Definition: edram.c:18
edram_bec
void edram_bec(struct XenosDevice *xe)
Definition: edram.c:865
edram_rev
u32 edram_rev
Definition: edram.c:18
xenos_write32
void xenos_write32(int reg, uint32_t val)
Definition: xenos.c:26
edram_4c
void edram_4c(struct XenosDevice *xe)
Definition: edram.c:1001
edram_compare_crc
int edram_compare_crc(uint32_t *crc)
Definition: edram.c:549
edram_init
void edram_init(struct XenosDevice *xe)
Definition: edram.c:1209
edram_974
void edram_974(struct XenosDevice *xe)
Definition: edram.c:737
edram_72c
void edram_72c(struct XenosDevice *xe)
Definition: edram.c:623
cnt
int cnt
Definition: enet.c:409
val
static uint32_t val
Definition: io.h:17
ptr
u32 ptr
Definition: iso9660.c:536
uint32_t
u32 uint32_t
Definition: libfdt_env.h:11
uint16_t
u16 uint16_t
Definition: libfdt_env.h:10
abort
void abort(void)
Definition: newlib.c:136
delay
void delay(int u)
Definition: time.c:22
udelay
void udelay(int u)
Definition: time.c:12
Xe_pDebugSync
void Xe_pDebugSync(struct XenosDevice *xe)
Definition: xe.c:1284
Xe_pAlloc
void * Xe_pAlloc(struct XenosDevice *xe, u32 *phys, int size, int align)
Definition: xe.c:62
Xe_pSyncToDevice
void Xe_pSyncToDevice(struct XenosDevice *xe, volatile void *data, int len)
Definition: xe.c:52
Xe_pSyncFromDevice
void Xe_pSyncFromDevice(struct XenosDevice *xe, volatile void *data, int len)
Definition: xe.c:57
Xe_Fatal
void Xe_Fatal(struct XenosDevice *xe, const char *fmt,...)
Definition: xe.c:1241
xe_internal.h
rput32
#define rput32(d)
Definition: xe_internal.h:14
w32
#define w32(o, v)
Definition: xe_internal.h:21
r32
#define r32(o)
Definition: xe_internal.h:20
xenon_smc_query_sensors
void xenon_smc_query_sensors(uint16_t *data)
Definition: xenon_smc.c:288
data
union @15 data
j
u8 j
Definition: xenos_edid.h:10
u32
uint32_t u32
32bit unsigned integer
Definition: xetypes.h:14
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